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Home > The Amp Hour Electronics Podcast > #547 – Open Source Mindset with Michael Gielda


	Podcast:		The Amp Hour Electronics Podcast
	Episode:		#547 – Open Source Mindset with Michael Gielda
	Category:		Science & Medicine
	Duration:		01:28:08
	Publish Date:		2021-06-29 01:53:59
	Description:		Welcome back, Michael Gielda of Antmicro! Michael was on episode 519 talking about simulating embedded hardware using Renode He returned to talk about other projects that Antmicro is working on, especially those that are open source. The open source projects are indexed on the Antmicro Open Source Portal. Very niche stuff might be closed source, but people are surprised by what others might be interested in (if it were open sourced) Renode was the topic of our last interview AI is a new target of open source work. Antmicro recently released the Kenning framework Why another standard? Relevant XKCD Testing & benchmarking different AI models/frameworks across platforms from different vendors e.g. Nvidia, Modivius or Google Coral Black boxes are bad for users LLVM has hundreds of people looking at the project CHIPS Alliance Brian Faith from QuickLogic,first ever FPGA vendor to adapt open source flow Sammy Cheung from Efinix Interchange format for FPGA tooling Virtex Ultrascale PCIe What happens when a proprietary licensed company goes bankrupt? Renode is being used for pre-silicon SoC development Covered Renode-based CI’s in previous episode Open source toolchain stuff RISC-V: The ISA is common, but the cores are different. What is the center of gravity in the RISC V world? Many people are using SiFive. SiFive uses Chisel ETH Zurich – another center of gravity – cores written in SystemVerilog Place for diversity Chisel (e.g. Antmicro’s DMA core) SystemVerilog – enabling use of SystemVerilog code in open source tools UVM – Universal Verification Methodology – recent progress with dynamic scheduling in Verilator Migen Zephyr bluetooth Abstraction as a response to chip shortage What if you wanted to do a fully open source flow? Let’s do a contrived security camera design example: Xilinx 7 series or Lattice ECP5 or Crosslink-NX Open source HWhw board using the Nvidia Jetson, manufactured by past guest Chris Osterwood VexRiscv Linux + LiteX LiteDRAM Ethernet core – everything but the phy Co simulate with Verilator Renode Episodes for open source toolchain Tim Claire Piotr Cutting down on iteration Chris mentions a past job that had 6 hour build cycles Accelerating workflows using compute power and parallelizing dev processes Working with GCP & building custom self-hosted GitHub runners Chip design using AI (Google) Scalenode ARVSOM BeagleV DC-SCM FPGA-based board management controller Open Compute Project Row Hammer Interested in working with Antmicro? Get in touch!
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